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» Implementing the Best Processor Cores
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ICPP
2006
IEEE
15 years 7 months ago
Designing Multithreaded Algorithms for Breadth-First Search and st-connectivity on the Cray MTA-2
stractions are extensively used to understand and solve challenging computational problems in various scientific and engineering domains. They have particularly gained prominence...
David A. Bader, Kamesh Madduri
135
Voted
CODES
2010
IEEE
14 years 12 months ago
Automatic parallelization of embedded software using hierarchical task graphs and integer linear programming
The last years have shown that there is no way to disregard the advantages provided by multiprocessor System-on-Chip (MPSoC) architectures in the embedded systems domain. Using mu...
Daniel Cordes, Peter Marwedel, Arindam Mallik
ISCA
2010
IEEE
413views Hardware» more  ISCA 2010»
15 years 7 months ago
Resistive computation: avoiding the power wall with low-leakage, STT-MRAM based computing
As CMOS scales beyond the 45nm technology node, leakage concerns are starting to limit microprocessor performance growth. To keep dynamic power constant across process generations...
Xiaochen Guo, Engin Ipek, Tolga Soyata
EUROPAR
2010
Springer
15 years 2 months ago
Multi-GPU and Multi-CPU Parallelization for Interactive Physics Simulations
Today, it is possible to associate multiple CPUs and multiple GPUs in a single shared memory architecture. Using these resources efficiently in a seamless way is a challenging issu...
Everton Hermann, Bruno Raffin, François Fau...
CHES
2009
Springer
200views Cryptology» more  CHES 2009»
16 years 2 months ago
Accelerating AES with Vector Permute Instructions
We demonstrate new techniques to speed up the Rijndael (AES) block cipher using vector permute instructions. Because these techniques avoid data- and key-dependent branches and mem...
Mike Hamburg