—Multicore architectures have established themselves as the new generation of computer architectures. As part of the one core to many cores evolution, memory access mechanisms ha...
In the last years high performance processor designs have evolved toward Chip-Multiprocessor (CMP) architectures that implement multiple processing cores on a single die. As the nu...
Kernel summations are a ubiquitous key computational bottleneck in many data analysis methods. In this paper, we attempt to marry, for the first time, the best relevant technique...
Dongryeol Lee, Richard W. Vuduc, Alexander G. Gray
Software has spent the bounty of Moore’s law by solving harder problems and exploiting abstractions, such as highlevel languages, virtual machine technology, binary rewritdynami...
Jungwoo Ha, Matthew Arnold, Stephen M. Blackburn, ...
Network-on-Chips (NoCs) are likely to become a critical shared resource in future many-core processors. The challenge is to develop policies and mechanisms that enable multiple ap...
Reetuparna Das, Onur Mutlu, Thomas Moscibroda, Chi...