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ICCD
2001
IEEE
98views Hardware» more  ICCD 2001»
15 years 10 months ago
In-Line Interrupt Handling for Software-Managed TLBs
The general-purpose precise interrupt mechanism, which has long been used to handle exceptional conditions that occur infrequently, is now being used increasingly often to handle ...
Aamer Jaleel, Bruce L. Jacob
IPPS
2009
IEEE
15 years 8 months ago
High-order stencil computations on multicore clusters
Stencil computation (SC) is of critical importance for broad scientific and engineering applications. However, it is a challenge to optimize complex, highorder SC on emerging clus...
Liu Peng, Richard Seymour, Ken-ichi Nomura, Rajiv ...
ISCA
1993
IEEE
117views Hardware» more  ISCA 1993»
15 years 6 months ago
Evaluation of Release Consistent Software Distributed Shared Memory on Emerging Network Technology
We evaluate the e ect of processor speed, network bandwidth, and software overhead on the performance of release-consistent software distributed shared memory. We examine ve di er...
Sandhya Dwarkadas, Peter J. Keleher, Alan L. Cox, ...
107
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ICFP
2007
ACM
16 years 1 months ago
Feedback directed implicit parallelism
In this paper we present an automated way of using spare CPU resources within a shared memory multi-processor or multi-core machine. Our approach is (i) to profile the execution o...
Tim Harris, Satnam Singh
ARCS
2009
Springer
15 years 8 months ago
Improving Memory Subsystem Performance Using ViVA: Virtual Vector Architecture
The disparity between microprocessor clock frequencies and memory latency is a primary reason why many demanding applications run well below peak achievable performance. Software c...
Joseph Gebis, Leonid Oliker, John Shalf, Samuel Wi...