29 search results - page 3 / 6 » Implementing time-predictable load and store operations |
116
Voted
CIIA
2009
15 years 2 months ago
2009
This paper describes our experience in processor/threads synchronization using the POSIX API standard for MPSoC virtual applications prototyping. Spin-Lock (Binary Semaphore) imple...
102
Voted
ICS
2001
Tsinghua U.
15 years 6 months ago
2001
Tsinghua U.
We describe the Slice Processor micro-architecture that implements a generalized operation-based prefetching mechanism. Operation-based prefetchers predict the series of operation...
139
Voted
CAV
2009
Springer
16 years 2 months ago
2009
Springer
Abstract. Pseudo-code descriptions of STMs assume sequentially consistent program execution and atomicity of high-level STM operations like read, write, and commit. These assumptio...
PODC
2003
ACM
15 years 7 months ago
2003
ACM
We present the first lock-free implementation of an extensible hash table running on current architectures. Our algorithm provides concurrent insert, delete, and find operations ...
125
Voted
PPOPP
1993
ACM
15 years 5 months ago
1993
ACM
This paper discusses some of the issues involved in implementing a shared-address space programming model on large-scale, distributed-memory multiprocessors. While such a programm...