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ICCD
2005
IEEE
124views Hardware» more  ICCD 2005»
15 years 6 months ago
A Thermally-Aware Methodology for Design-Specific Optimization of Supply and Threshold Voltages in Nanometer Scale ICs
As CMOS technology scales deeper into the nanometer regime, factors such as leakage power and chip temperature emerge as critically important concerns for VLSI design. This paper,...
Sheng-Chih Lin, Navin Srivastava, Kaustav Banerjee
ISCAS
2007
IEEE
113views Hardware» more  ISCAS 2007»
15 years 3 months ago
Design Considerations for Future RF Circuits
TheRFdesignparadigm will changesignificantly asCMOS technology scales and integration levels rise to accommodate multi-band, multi-mode transceivers and baseband processors. This...
Behzad Razavi
DATE
2006
IEEE
82views Hardware» more  DATE 2006»
15 years 3 months ago
Power-aware compilation for embedded processors with dynamic voltage scaling and adaptive body biasing capabilities
Traditionally, active power has been the primary source of power dissipation in CMOS designs. Although, leakage power is becoming increasingly more important as technology feature...
Po-Kuan Huang, Soheil Ghiasi
DAC
2004
ACM
15 years 10 months ago
Simultaneous optimization of supply and threshold voltages for low-power and high-performance circuits in the leakage dominant e
Electrothermal couplings between supply voltage, operating frequency, power dissipation and die temperature have been shown to significantly impact the energy-delay-product (EDP) ...
Anirban Basu, Sheng-Chih Lin, Vineet Wason, Amit M...
DATE
2008
IEEE
117views Hardware» more  DATE 2008»
15 years 3 months ago
A Scalable Algorithmic Framework for Row-Based Power-Gating
Leakage power is a serious concern in nanometer CMOS technologies. In this paper we focus on leakage reduction through automatic insertion of sleep transistors for power gating in...
Ashoka Visweswara Sathanur, Antonio Pullini, Luca ...