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TVLSI
2010
14 years 4 months ago
Dynamic and Leakage Energy Minimization With Soft Real-Time Loop Scheduling and Voltage Assignment
With the shrinking of technology feature sizes, the share of leakage in total power consumption of digital systems continues to grow. Traditional dynamic voltage scaling (DVS) fail...
Meikang Qiu, Laurence Tianruo Yang, Zili Shao, Edw...
ASPDAC
2007
ACM
136views Hardware» more  ASPDAC 2007»
15 years 1 months ago
Design tool solutions for mixed-signal/RF circuit design in CMOS nanometer technologies
The scaling of CMOS technology into the nanometer era enables the fabrication of highly integrated systems, which increasingly contain analog and/or RF parts. However, scaling into...
Georges G. E. Gielen
DAC
2001
ACM
15 years 10 months ago
Analysis of On-Chip Inductance Effects using a Novel Performance Optimization Methodology for Distributed RLC Interconnects
This work presents a new and computationally efficient performance optimization technique for distributed RLC interconnects based on a rigorous delay computation scheme. The new o...
Kaustav Banerjee, Amit Mehrotra
CASES
2004
ACM
15 years 2 months ago
Reducing both dynamic and leakage energy consumption for hard real-time systems
While the dynamic voltage scaling (DVS) techniques are efficient in reducing the dynamic energy consumption for the processor, varying voltage alone becomes less effective for t...
Linwei Niu, Gang Quan
DATE
2006
IEEE
88views Hardware» more  DATE 2006»
15 years 3 months ago
Enabling fine-grain leakage management by voltage anchor insertion
Functional unit shutdown based on MTCMOS devices is effective for leakage reduction in aggressively scaled technologies. However, the applicability of MTCMOS-based shutdown in a s...
Pietro Babighian, Luca Benini, Alberto Macii, Enri...