141 search results - page 6 / 29 » Implications of technology scaling on leakage reduction tech... |
ISVLSI
2008
IEEE
15 years 3 months ago
2008
IEEE
The share of leakage in cache power consumption increases with technology scaling. Choosing a higher threshold voltage (Vth) and/or gate-oxide thickness (Tox) for cache transistor...
ISLPED
2005
ACM
15 years 3 months ago
2005
ACM
SRAM leakage constitutes a significant portion of the standby power budget of modern SoC products for handheld applications such as PDA and cellular phones. NMOS and PMOS reverse ...
PATMOS
2004
Springer
15 years 2 months ago
2004
Springer
Leakage power consumption of current CMOS technology is already a great challenge. ITRS projects that leakage power consumption may come to dominate total chip power consumption as...
ICCAD
2003
IEEE
15 years 6 months ago
2003
IEEE
Abstract— Dynamic voltage scaling (DVS) is a powerful technique for reducing dynamic power consumption in a computing system. However, as technology feature size continues to sca...
DAC
2005
ACM
14 years 11 months ago
2005
ACM
Methodology, EDA Flow, scripts, and documentation plays a tremendous role in the deployment and standardization of advanced design techniques. In this paper we focus not only on l...