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» Improve Chip Pin Performance Using Optical Interconnects
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HPCA
2008
IEEE
15 years 11 months ago
Regional congestion awareness for load balance in networks-on-chip
Interconnection networks-on-chip (NOCs) are rapidly replacing other forms of interconnect in chip multiprocessors and system-on-chip designs. Existing interconnection networks use...
Paul Gratz, Boris Grot, Stephen W. Keckler
TCS
1998
14 years 11 months ago
TWDM Multichannel Lightwave Hypercube Networks
The hypercube is a widely used interconnection topology as it presents a lot of attractive properties. Recently, the hypercube has been proposed as a virtual topology for TWDM mul...
Peng-Jun Wan
VLSID
2007
IEEE
146views VLSI» more  VLSID 2007»
15 years 11 months ago
Architecting Microprocessor Components in 3D Design Space
Interconnect is one of the major concerns in current and future microprocessor designs from both performance and power consumption perspective. The emergence of three-dimensional ...
Balaji Vaidyanathan, Wei-Lun Hung, Feng Wang 0004,...
DAC
2005
ACM
16 years 12 days ago
Advanced Timing Analysis Based on Post-OPC Extraction of Critical Dimensions
While performance specifications are verified before sign-off for a modern nanometer scale design, extensive application of optical proximity correction substantially alters the l...
Puneet Gupta, Andrew B. Kahng, Youngmin Kim, Denni...
FPL
2001
Springer
102views Hardware» more  FPL 2001»
15 years 3 months ago
Technology Trends and Adaptive Computing
System and processor architectures depend on changes in technology. Looking ahead as die density and speed increase, power consumption and on chip interconnection delay become incr...
Michael J. Flynn, Albert A. Liddicoat