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DATE
2002
IEEE
118views Hardware» more  DATE 2002»
15 years 10 months ago
A Complete Data Scheduler for Multi-Context Reconfigurable Architectures
: A new technique is presented in this paper to improve the efficiency of data scheduling for multi-context reconfigurable architectures targeting multimedia and DSP applications. ...
Marcos Sanchez-Elez, Milagros Fernández, Ra...
ISPD
1999
ACM
94views Hardware» more  ISPD 1999»
15 years 10 months ago
Gate sizing with controlled displacement
- In this paper, we present an algorithm for gate sizing with controlled displacement to improve the overall circuit timing. We use a path-based delay model to capture the timing c...
Wei Chen, Cheng-Ta Hsieh, Massoud Pedram
SRDS
1994
IEEE
15 years 9 months ago
Probabilistic Internal Clock Synchronization
We propose an improved probabilistic method for reading remote clocks in systems subject to unbounded communication delays and use this method to design a family of fault-tolerant...
Flaviu Cristian, Christof Fetzer
151
Voted
PLDI
1995
ACM
15 years 9 months ago
Storage Assignment to Decrease Code Size
DSP architectures typically provide indirect addressing modes with auto-increment and decrement. In addition, indexing mode is not available, and there are usually few, if any, ge...
Stan Y. Liao, Srinivas Devadas, Kurt Keutzer, Stev...
169
Voted
CVPR
2009
IEEE
15 years 9 months ago
Symmetry integrated region-based image segmentation
Symmetry is an important cue for machine perception that involves high-level knowledge of image components. Unlike most of the previous research that only computes symmetry in an ...
Yu Sun, Bir Bhanu