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DAC
1998
ACM
16 years 2 months ago
Exact Tree-based FPGA Technology Mapping for Logic Blocks with Independent LUTs
The logic blocks CLBs of a lookup table LUT based FPGA consist of one or more LUTs, possibly of di erent sizes. In this paper, we focus on technology mapping for CLBs with several...
Madhukar R. Korupolu, K. K. Lee, D. F. Wong
ICNP
2007
IEEE
15 years 8 months ago
Greedy Virtual Coordinates for Geographic Routing
— We present a new approach for generating virtual coordinates that produces usable coordinates quickly and improves the routing performance of existing geographic routing algori...
Ben Leong, Barbara Liskov, Robert Morris
AINA
2010
IEEE
15 years 6 months ago
The Cost Effective Pre-processing Based NFA Pattern Matching Architecture for NIDS
—Network Intrusion Detection System (NIDS) is a system which can detect network attacks resulted from worms and viruses on the Internet. An efficient pattern matching algorithm p...
Yeim-Kuan Chang, Chen-Rong Chang, Cheng-Chien Su
119
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MWCN
2004
Springer
15 years 7 months ago
Route Stability Techniques for Enhanced Video Delivery on Manets
Abstract One of the main problems associated with MANETs is that mobility and the associated route discovery and maintenance procedures of reactive routing protocols cause interrup...
Carlos Miguel Tavares Calafate, Manuel P. Malumbre...
PPOPP
2010
ACM
15 years 8 months ago
Load balancing on speed
To fully exploit multicore processors, applications are expected to provide a large degree of thread-level parallelism. While adequate for low core counts and their typical worklo...
Steven Hofmeyr, Costin Iancu, Filip Blagojevic