139 search results - page 17 / 28 » Improved Algorithms for the Global Cardinality Constraint |
ASPDAC
2008
ACM
15 years 1 months ago
2008
ACM
In this paper, we propose an optimal gate sizing and clock skew optimization algorithm for globally sizing synchronous sequential circuits. The number of constraints and variables ...
101
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TWC
2008
14 years 11 months ago
2008
In this paper, designing an effective user relaying algorithm, in terms of relay node selection and power allocation, is discussed for amplify-and-forward wireless relay networks. ...
103
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WADS
2001
Springer
15 years 4 months ago
2001
Springer
Abstract. We describe fully polynomial time approximation schemes for generalized multicommodity flow problems arising in VLSI applications such as Global Routing via Buffer Block...
FOCS
2009
IEEE
15 years 6 months ago
2009
IEEE
Abstract— A number of recent results on optimization problems involving submodular functions have made use of the ”multilinear relaxation” of the problem [3], [8], [24], [14]...
ICCAD
2004
IEEE
15 years 8 months ago
2004
IEEE
In this paper we study the technology mapping problem for FPGA architectures to minimize chip area, or the total number of lookup tables (LUTs) of the mapped design, under the chi...