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CCGRID
2011
IEEE
14 years 1 months ago
A Segment-Level Adaptive Data Layout Scheme for Improved Load Balance in Parallel File Systems
Abstract—Parallel file systems are designed to mask the everincreasing gap between CPU and disk speeds via parallel I/O processing. While they have become an indispensable compo...
Huaiming Song, Yanlong Yin, Xian-He Sun, Rajeev Th...
63
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CAISE
2003
Springer
15 years 2 months ago
Improving e-Form Layout Through Analysis of Form Semantics and Validation Checks
Transaction services offered by public authorities vary from simple forms with few fields to multi-form compound documents with hundreds of input areas. In the latter case, field p...
Costas Vassilakis, George Lepouras, Stathis Rouvas...
PLDI
2005
ACM
15 years 3 months ago
Automatic pool allocation: improving performance by controlling data structure layout in the heap
This paper describes Automatic Pool Allocation, a transformation framework that segregates distinct instances of heap-based data structures into seperate memory pools and allows h...
Chris Lattner, Vikram S. Adve
VLSID
1999
IEEE
100views VLSI» more  VLSID 1999»
15 years 1 months ago
Improved Effective Capacitance Computations for Use in Logic and Layout Optimization
We describe an improved iterationless approach for computing the effective capacitance of an interconnect load at a driving gate output. The speed and accuracy of our approach mak...
Andrew B. Kahng, Sudhakar Muddu
IFL
2000
Springer
15 years 1 months ago
Improving Cache Effectiveness through Array Data Layout Manipulation in SAC
Sac is a functional array processing language particularly designed with numerical applications in mind. In this field the runtime performance of programs critically depends on the...
Clemens Grelck