376 search results - page 26 / 76 » Improved Design Debugging Using Maximum Satisfiability |
68
Voted
DAC
2005
ACM
15 years 10 months ago
2005
ACM
This paper attempts to quantify the optimality of FPGA technology mapping algorithms. We develop an algorithm, based on Boolean satisfiability (SAT), that is able to map a small s...
CODES
2007
IEEE
15 years 4 months ago
2007
IEEE
Memory requirements of intellectual property components (IP) in contemporary multi-processor systems-on-chip are increasing. Large high-speed external memories, such as DDR2 SDRAM...
ICCAD
2002
IEEE
15 years 6 months ago
2002
IEEE
We propose to introduce redundant interconnects for manufacturing yield and reliability improvement. By introducing redundant interconnects, the potential for open faults is reduc...
FLAIRS
2008
15 years 2 hour ago
2008
In machine learning, decision trees are employed extensively in solving classification problems. In order to design a decision tree classifier two main phases are employed. The fi...
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TVLSI
2008
14 years 9 months ago
2008
Decoupling capacitors are widely used to reduce power supply noise. On-chip decoupling capacitors have traditionally been allocated into the white space available on a die or place...