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» Improved Design Debugging Using Maximum Satisfiability
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USENIX
2004
14 years 11 months ago
Making the "Box" Transparent: System Call Performance as a First-Class Result
For operating system intensive applications, the ability of designers to understand system call performance behavior is essential to achieving high performance. Conventional perfo...
Yaoping Ruan, Vivek S. Pai
DSL
1997
14 years 11 months ago
Experience with a Language for Writing Coherence Protocols
In this paper we describe our experience with Teapot [7], a domain-specific language for writing cache coherence protocols. Cache coherence is of concern when parallel and distrib...
Satish Chandra, James R. Larus, Michael Dahlin, Br...
71
Voted
DAC
2006
ACM
15 years 10 months ago
A thermally-aware performance analysis of vertically integrated (3-D) processor-memory hierarchy
Three-dimensional (3-D) integrated circuits have emerged as promising candidates to overcome the interconnect bottlenecks of nanometer scale designs. While they offer several othe...
Gian Luca Loi, Banit Agrawal, Navin Srivastava, Sh...
MICRO
2003
IEEE
148views Hardware» more  MICRO 2003»
15 years 3 months ago
Fast Secure Processor for Inhibiting Software Piracy and Tampering
Due to the widespread software piracy and virus attacks, significant efforts have been made to improve security for computer systems. For stand-alone computers, a key observation...
Jun Yang 0002, Youtao Zhang, Lan Gao
CIMAGING
2010
202views Hardware» more  CIMAGING 2010»
14 years 11 months ago
An optimal algorithm for reconstructing images from binary measurements
We have studied a camera with a very large number of binary pixels referred to as the gigavision camera [1] or the gigapixel digital film camera [2, 3]. Potential advantages of th...
Feng Yang, Yue M. Lu, Luciano Sbaiz, Martin Vetter...