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» Improved Design Debugging Using Maximum Satisfiability
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ASPDAC
2007
ACM
77views Hardware» more  ASPDAC 2007»
15 years 1 months ago
Hippocrates: First-Do-No-Harm Detailed Placement
Physical synthesis optimizations and engineering change orders typically change the locations of cells, resize cells or add more cells to the design after global placement. Unfort...
Haoxing Ren, David Z. Pan, Charles J. Alpert, Gi-J...
65
Voted
IPPS
1998
IEEE
15 years 1 months ago
Efficient Runtime Thread Management for the Nano-Threads Programming Model
Abstract. The nano-threads programming model was proposed to effectively integrate multiprogramming on shared-memory multiprocessors, with the exploitation of fine-grain parallelis...
Dimitrios S. Nikolopoulos, Eleftherios D. Polychro...
TWC
2010
14 years 4 months ago
Adaptive Modulation for MIMO Systems with Channel Prediction Errors
The performance of multiple-input multiple-output (MIMO) systems using spatial multiplexing is analyzed under channel prediction errors. We derive exact closed-form expressions for...
Unai Fernández-Plazaola, Eduardo Martos-Nay...
76
Voted
DATE
2009
IEEE
102views Hardware» more  DATE 2009»
15 years 4 months ago
Register placement for high-performance circuits
—In modern sub-micron design, achieving low-skew clock distributions is facing challenges for high-performance circuits. Symmetric global clock distribution and clock tree synthe...
Mei-Fang Chiang, Takumi Okamoto, Takeshi Yoshimura
63
Voted
ASPDAC
2005
ACM
86views Hardware» more  ASPDAC 2005»
15 years 3 months ago
Thermal-driven multilevel routing for 3-D ICs
3-D IC has a great potential for improving circuit performance and degree of integration. It is also an attractive platform for system-on-chip or system-in-package solutions. A cr...
Jason Cong, Yan Zhang