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66
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ISCAS
2006
IEEE
124views Hardware» more  ISCAS 2006»
15 years 6 months ago
A 12-bit 300 MHz CMOS DAC for high-speed system applications
—This paper describes a 12-bit 300 MHz CMOS DAC for high-speed system applications. The proposed DAC consists of a unit current-cell matrix for 8 MSBs and a binaryweighted array ...
Weining Ni, Xueyang Geng, Yin Shi, Foster F. Dai
106
Voted
ARITH
2003
IEEE
15 years 5 months ago
Some Optimizations of Hardware Multiplication by Constant Matrices
This paper presents some improvements on the optimization of hardware multiplication by constant matrices. We focus on the automatic generation of circuits that involve constant m...
Nicolas Boullis, Arnaud Tisserand
99
Voted
ICASSP
2009
IEEE
15 years 7 months ago
Improved subspace DoA estimation methods with large arrays: The deterministic signals case
This paper is devoted to the subspace DoA estimation using a large antennas array when the number of available snapshots is of the same order of magnitude than the number of senso...
Pascal Vallet, Philippe Loubaton, Xavier Mestre
70
Voted
ICDCS
1999
IEEE
15 years 4 months ago
Interpreting Stale Load Information
In this paper we examine the problem of balancing load in a large-scale distributed system when information about server loads may be stale. It is well known that sending each req...
Michael Dahlin
AAAI
2008
15 years 2 months ago
Automating To-Do Lists for Users: Interpretation of To-Dos for Selecting and Tasking Agents
To-do lists have been found to be the most popular personal information management tools, yet there is no automated system to interpret and act upon them when appropriate on behal...
Yolanda Gil, Varun Ratnakar