100 search results - page 15 / 20 » Improved Policies for Drowsy Caches in Embedded Processors |
SAS
2009
Springer
16 years 6 days ago
2009
Springer
Interpretation of FIFO Replacement Daniel Grund and Jan Reineke Saarland University, Saarbr?ucken, Germany In hard real-time systems, the execution time of programs must be bounded...
CN
2002
14 years 11 months ago
2002
We describe the design, implementation and performance of a high-performance Web server accelerator which runs on an embedded operating system and improves Web server performance ...
101
click to vote
GLVLSI
2007
IEEE
15 years 3 months ago
2007
IEEE
Application-specific instruction set processor (ASIP) has become an important design choice for embedded systems. It can achieve both high flexibility offered by the base processo...
MICRO
2006
IEEE
15 years 5 months ago
2006
IEEE
With the trend towards increasing number of processor cores in future chip architectures, scalable directory-based protocols for maintaining cache coherence will be needed. Howeve...
124
click to vote
PDIS
1991
IEEE
15 years 3 months ago
1991
IEEE
Improvements in the processing speed of multiprocessors are outpacing improvements in the speed of disk hardware. Parallel disk I/O subsystems have been proposed as one way to clo...