100 search results - page 18 / 20 » Improved Policies for Drowsy Caches in Embedded Processors |
CASES
2001
ACM
13 years 10 months ago
2001
ACM
Abstract. Existing variable-length instruction formats provide higher code densities than fixed-length formats, but are ill-suited to pipelined or parallel instruction fetch and de...
DAC
2004
ACM
14 years 7 months ago
2004
ACM
Code compression has been shown to be an effective technique to reduce code size in memory constrained embedded systems. It has also been used as a way to increase cache hit ratio...
IEEEPACT
2006
IEEE
14 years 8 days ago
2006
IEEE
Multiprocessor operating systems (OSs) pose several unique and conflicting challenges to System Virtual Machines (System VMs). For example, most existing system VMs resort to gan...
IEEEPACT
2009
IEEE
13 years 4 months ago
2009
IEEE
Abstract--Version management, one of the key design dimensions of Hardware Transactional Memory (HTM) systems, defines where and how transactional modifications are stored. Current...
ISLPED
2010
ACM
13 years 6 months ago
2010
ACM
Runtime characteristics of individual threads (such as IPC, cache usage, etc.) are a critical factor in making efficient scheduling decisions in modern chip-multiprocessor systems...