100 search results - page 4 / 20 » Improved Policies for Drowsy Caches in Embedded Processors |
98
Voted
HPCA
2012
IEEE
13 years 5 months ago
2012
IEEE
The least recently used (LRU) replacement policy performs poorly in the last-level cache (LLC) because temporal locality of memory accesses is filtered by first and second level...
DAC
2008
ACM
15 years 10 months ago
2008
ACM
Today, embedded processors are expected to be able to run complex, algorithm-heavy applications that were originally designed and coded for general-purpose processors. As a result...
139
Voted
MICRO
2005
IEEE
15 years 3 months ago
2005
IEEE
We present the TM3270 media-processor, the latest TriMedia VLIW processor, tuned to address the performance demands of standard definition video processing, combined with embedded...
70
Voted
DATE
2008
IEEE
15 years 4 months ago
2008
IEEE
—The contribution of memory latency to execution time continues to increase, and latency hiding mechanisms become ever more important for efficient processor design. While high-...
IPPS
1998
IEEE
15 years 1 months ago
1998
IEEE
In this paper, we present several novel strategies to improve software controlled cache utilization, so as to achieve lower power requirements for multi-media and signal processin...