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» Improved Simulation of Stabilizer Circuits
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ICCAD
2007
IEEE
103views Hardware» more  ICCAD 2007»
15 years 6 months ago
Enhancing design robustness with reliability-aware resynthesis and logic simulation
While circuit density and power efficiency increase with each major advance in IC technology, reliability with respect to soft errors tends to decrease. Current solutions to this...
Smita Krishnaswamy, Stephen Plaza, Igor L. Markov,...
IPPS
1998
IEEE
15 years 2 months ago
Meta-heuristics for Circuit Partitioning in Parallel Test Generation
In this communication Simulated Annealing and Genetic Algorithms, are applied to the graph partitioning problem. These techniques mimic processes in statistical mechanics and biol...
Consolación Gil, Julio Ortega, Antonio F. D...
MTV
2007
IEEE
118views Hardware» more  MTV 2007»
15 years 4 months ago
Reduction of Power Dissipation during Scan Testing by Test Vector Ordering
Test vector ordering is recognized as a simple and non-intrusive approach to assist test power reduction. Simulation based test vector ordering approach to minimize circuit transit...
Wang-Dauh Tseng, Lung-Jen Lee
STOC
2005
ACM
103views Algorithms» more  STOC 2005»
15 years 10 months ago
New and improved constructions of non-malleable cryptographic protocols
We present a new constant round protocol for non-malleable zero-knowledge. Using this protocol as a subroutine, we obtain a new constant-round protocol for non-malleable commitmen...
Rafael Pass, Alon Rosen
JCP
2008
141views more  JCP 2008»
14 years 10 months ago
Leakage Controlled Read Stable Static Random Access Memories
Semiconductor manufacturing process scaling increases leakage and transistor variations, both of which are problematic for static random access memory (SRAM). Since SRAM is a criti...
Sayeed A. Badrudduza, Ziyan Wang, Giby Samson, Law...