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» Improved Simulation of Stabilizer Circuits
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FPGA
2010
ACM
182views FPGA» more  FPGA 2010»
14 years 8 months ago
A comprehensive approach to modeling, characterizing and optimizing for metastability in FPGAs
Metastability is a phenomenon that can cause system failures in digital circuits. It may occur whenever signals are being transmitted across asynchronous or unrelated clock domain...
Doris Chen, Deshanand Singh, Jeffrey Chromczak, Da...
ICCAD
1995
IEEE
170views Hardware» more  ICCAD 1995»
15 years 1 months ago
Acceleration techniques for dynamic vector compaction
: We present several techniques for accelerating dynamic vector compaction for combinational and sequential circuits. A key feature of all our techniques is that they significantly...
Anand Raghunathan, Srimat T. Chakradhar
DATE
2008
IEEE
76views Hardware» more  DATE 2008»
15 years 4 months ago
Signal Probability Based Statistical Timing Analysis
VLSI timing analysis and power estimation target the same circuit switching activity. Power estimation techniques are categorized as (1) static, (2) statistical, and (3) simulatio...
Bao Liu
DAC
2005
ACM
15 years 11 months ago
Incremental exploration of the combined physical and behavioral design space
Achieving design closure is one of the biggest headaches for modern VLSI designers. This problem is exacerbated by high-level design automation tools that ignore increasingly impo...
Zhenyu (Peter) Gu, Jia Wang, Robert P. Dick, Hai Z...
SIGMETRICS
2002
ACM
104views Hardware» more  SIGMETRICS 2002»
14 years 9 months ago
Improving cluster availability using workstation validation
We demonstrate a framework for improving the availability of cluster based Internet services. Our approach models Internet services as a collection of interconnected components, e...
Taliver Heath, Richard P. Martin, Thu D. Nguyen