Sciweavers

78 search results - page 5 / 16
» Improved procedure placement for set associative caches
Sort
View
MICRO
2007
IEEE
184views Hardware» more  MICRO 2007»
15 years 4 months ago
Data Access Partitioning for Fine-grain Parallelism on Multicore Architectures
The recent design shift towards multicore processors has spawned a significant amount of research in the area of program parallelization. The future abundance of cores on a singl...
Michael L. Chu, Rajiv A. Ravindran, Scott A. Mahlk...
DATE
2002
IEEE
114views Hardware» more  DATE 2002»
15 years 2 months ago
Test Enrichment for Path Delay Faults Using Multiple Sets of Target Faults
Test sets for path delay faults in circuits with large numbers of paths are typically generated for path delay faults associated with the longest circuit paths. We show that such ...
Irith Pomeranz, Sudhakar M. Reddy
LCTRTS
2007
Springer
15 years 3 months ago
Compiler-managed partitioned data caches for low power
Set-associative caches are traditionally managed using hardwarebased lookup and replacement schemes that have high energy overheads. Ideally, the caching strategy should be tailor...
Rajiv A. Ravindran, Michael L. Chu, Scott A. Mahlk...
ISCAPDCS
2007
14 years 11 months ago
Evaluation of architectural support for speech codecs application in large-scale parallel machines
— Next generation multimedia mobile phones that use the high bandwidth 3G cellular radio network consume more power. Multimedia algorithms such as speech, video transcodecs have ...
Naeem Zafar Azeemi
HPCA
2000
IEEE
15 years 2 months ago
Modified LRU Policies for Improving Second-Level Cache Behavior
Main memory accesses continue to be a significant bottleneck for applications whose working sets do not fit in second-level caches. With the trend of greater associativity in seco...
Wayne A. Wong, Jean-Loup Baer