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DATE
2009
IEEE
136views Hardware» more  DATE 2009»
15 years 4 months ago
A file-system-aware FTL design for flash-memory storage systems
Abstract—As flash memory became popular over various platforms, there is a strong demand on the performance degradation problem, due to the special characteristics of flash mem...
Po-Liang Wu, Yuan-Hao Chang, Tei-Wei Kuo
HPCC
2009
Springer
14 years 7 months ago
Reliability Optimization of Reconfigurable Computing-Based Fault-Tolerant System
Domain-partition (DP) model is a general model for reliability maximization problem under given redundancy. In this paper, an improved DP model is used to formulate a reconfigurati...
Mi Zhou, Lihong Shang, Yu Hu
DSN
2005
IEEE
15 years 3 months ago
Checking Array Bound Violation Using Segmentation Hardware
The ability to check memory references against their associated array/buffer bounds helps programmers to detect programming errors involving address overruns early on and thus avo...
Lap-Chung Lam, Tzi-cker Chiueh
CPHYSICS
2010
135views more  CPHYSICS 2010»
14 years 10 months ago
An events based algorithm for distributing concurrent tasks on multi-core architectures
In this paper, a programming model is presented which enables scalable parallel performance on multi-core shared memory architectures. The model has been developed for application...
David W. Holmes, John R. Williams, Peter Tilke
EVOW
2005
Springer
15 years 3 months ago
Automated Photogrammetric Network Design Using the Parisian Approach
We present a novel camera network design methodology based on the Parisian approach to evolutionary computation. The problem is partitioned into a set of homogeneous elements, whos...
Enrique Dunn, Gustavo Olague, Evelyne Lutton