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SAS
2009
Springer
281views Formal Methods» more  SAS 2009»
16 years 10 days ago
A Verifiable, Control Flow Aware Constraint Analyzer for Bounds Check Elimination
The Java programming language requires that out-of-bounds array accesses produce runtime exceptions. In general, this requires a dynamic bounds check each time an array element is...
David Niedzielski, Jeffery von Ronne, Andreas Gamp...
HPCA
2001
IEEE
16 years 5 days ago
Speculative Data-Driven Multithreading
Mispredicted branches and loads that miss in the cache cause the majority of retirement stalls experienced by sequential processors; we call these critical instructions. Despite t...
Amir Roth, Gurindar S. Sohi
ICCAD
2006
IEEE
127views Hardware» more  ICCAD 2006»
15 years 8 months ago
Platform-based resource binding using a distributed register-file microarchitecture
Behavior synthesis and optimization beyond the register transfer level require an efficient utilization of the underlying platform features. This paper presents a platform-based ...
Jason Cong, Yiping Fan, Wei Jiang
ICCAD
2003
IEEE
109views Hardware» more  ICCAD 2003»
15 years 8 months ago
Large-Scale Circuit Placement: Gap and Promise
Placement is one of the most important steps in the RTLto-GDSII synthesis process, as it directly defines the interconnects, which have become the bottleneck in circuit and syste...
Jason Cong, Tim Kong, Joseph R. Shinnerl, Min Xie,...
INFOCOM
2007
IEEE
15 years 6 months ago
A Framework for Measuring and Predicting the Impact of Routing Changes
— Routing dynamics heavily influence Internet data plane performance. Existing studies only narrowly focused on a few destinations and did not consider the predictability of the...
Ying Zhang, Zhuoqing Morley Mao, Jia Wang