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ICRA
2010
IEEE
180views Robotics» more  ICRA 2010»
14 years 11 months ago
Design, simulation and evaluation of kinematic alternatives for Insertable Robotic Effectors Platforms in Single Port Access Sur
This paper presents the task specifications for designing a novel Insertable Robotic Effectors Platform (IREP) with integrated stereo vision and surgical intervention tools for Sin...
Jienan Ding, Kai Xu 0005, Roger E. Goldman, Peter ...
RTAS
2005
IEEE
15 years 7 months ago
Bounding Worst-Case Data Cache Behavior by Analytically Deriving Cache Reference Patterns
While caches have become invaluable for higher-end architectures due to their ability to hide, in part, the gap between processor speed and memory access times, caches (and partic...
Harini Ramaprasad, Frank Mueller
PLDI
2004
ACM
15 years 7 months ago
Min-cut program decomposition for thread-level speculation
With billion-transistor chips on the horizon, single-chip multiprocessors (CMPs) are likely to become commodity components. Speculative CMPs use hardware to enforce dependence, al...
Troy A. Johnson, Rudolf Eigenmann, T. N. Vijaykuma...
IPPS
2003
IEEE
15 years 7 months ago
Parallel ROLAP Data Cube Construction On Shared-Nothing Multiprocessors
The pre-computation of data cubes is critical to improving the response time of On-Line Analytical Processing (OLAP) systems and can be instrumental in accelerating data mining tas...
Ying Chen, Frank K. H. A. Dehne, Todd Eavis, Andre...
DAC
1998
ACM
15 years 6 months ago
Synthesis of Power-Optimized and Area-Optimized Circuits from Hierarchical Behavioral Descriptions
We present a technique for synthesizing power- as well as area-optimized circuits from hierarchical data flow graphs under throughput constraints. We allow for the use of complex...
Ganesh Lakshminarayana, Niraj K. Jha