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ISCA
2010
IEEE
205views Hardware» more  ISCA 2010»
15 years 7 months ago
The virtual write queue: coordinating DRAM and last-level cache policies
In computer architecture, caches have primarily been viewed as a means to hide memory latency from the CPU. Cache policies have focused on anticipating the CPU’s data needs, and...
Jeffrey Stuecheli, Dimitris Kaseridis, David Daly,...
CHI
2008
ACM
16 years 2 months ago
Navigation techniques for dual-display e-book readers
Existing e-book readers do not do a good job supporting many reading tasks that people perform, as ethnographers report that when reading, people frequently read from multiple dis...
Cassandra Lewis, François Guimbretiè...
CIKM
2004
Springer
15 years 7 months ago
Composable XML integration grammars
The proliferation of XML as a standard for data representation and exchange in diverse, next-generation Web applications has created an emphatic need for effective XML data-integr...
Wenfei Fan, Minos N. Garofalakis, Ming Xiong, Xibe...
RTCSA
1998
IEEE
15 years 6 months ago
Wait-Free Snapshots in Real-Time Systems: Algorithms and Performance
Snap-shot mechanisms are used to read a globally consistent set of variable values. Such a mechanism can be used to solve a variety of communication and synchronization problems, ...
Andreas Ermedahl, Hans Hansson, Marina Papatrianta...
ASPDAC
2007
ACM
120views Hardware» more  ASPDAC 2007»
15 years 6 months ago
Integrating Power Management into Distributed Real-time Systems at Very Low Implementation Cost
The development cost of low-power embedded systems can be significantly reduced by reusing legacy designs and applying proper modifications to meet the new power constraints. The ...
Bita Gorjiara, Nader Bagherzadeh, Pai H. Chou