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ISQED
2010
IEEE
121views Hardware» more  ISQED 2010»
15 years 7 months ago
A novel two-dimensional scan-control scheme for test-cost reduction
— This paper proposes a two-dimensional scan shift control concept for multiple scan chain design. Multiple scan chain test scheme provides very low scan power by skipping many l...
Chia-Yi Lin, Hung-Ming Chen
IWCMC
2010
ACM
15 years 3 months ago
On the use of random neural networks for traffic matrix estimation in large-scale IP networks
Despite a large body of literature and methods devoted to the Traffic Matrix (TM) estimation problem, the inference of traffic flows volume from aggregated data still represents a ...
Pedro Casas, Sandrine Vaton
IPPS
2010
IEEE
14 years 12 months ago
A lock-free, cache-efficient multi-core synchronization mechanism for line-rate network traffic monitoring
Line-rate data traffic monitoring in high-speed networks is essential for network management. To satisfy the line-rate requirement, one can leverage multi-core architectures to par...
Patrick P. C. Lee, Tian Bu, Girish P. Chandranmeno...
ISLPED
2003
ACM
88views Hardware» more  ISLPED 2003»
15 years 7 months ago
Reducing data cache energy consumption via cached load/store queue
High-performance processors use a large set–associative L1 data cache with multiple ports. As clock speeds and size increase such a cache consumes a significant percentage of t...
Dan Nicolaescu, Alexander V. Veidenbaum, Alexandru...
BMCBI
2005
115views more  BMCBI 2005»
15 years 1 months ago
MPrime: efficient large scale multiple primer and oligonucleotide design for customized gene microarrays
Background: Enhancements in sequencing technology have recently yielded assemblies of large genomes including rat, mouse, human, fruit fly, and zebrafish. The availability of larg...
Eric C. Rouchka, Abdelnaby Khalyfa, Nigel G. F. Co...