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PCI
2005
Springer
15 years 9 months ago
Tuning Blocked Array Layouts to Exploit Memory Hierarchy in SMT Architectures
Cache misses form a major bottleneck for memory-intensive applications, due to the significant latency of main memory accesses. Loop tiling, in conjunction with other program tran...
Evangelia Athanasaki, Kornilios Kourtis, Nikos Ana...
LREC
2010
150views Education» more  LREC 2010»
15 years 5 months ago
Detection of Peculiar Examples using LOF and One Class SVM
This paper proposes the method to detect peculiar examples of the target word from a corpus. The peculiar example is regarded as an outlier in the given example set. Therefore we ...
Hiroyuki Shinnou, Minoru Sasaki
IPPS
2010
IEEE
15 years 2 months ago
A lock-free, cache-efficient multi-core synchronization mechanism for line-rate network traffic monitoring
Line-rate data traffic monitoring in high-speed networks is essential for network management. To satisfy the line-rate requirement, one can leverage multi-core architectures to par...
Patrick P. C. Lee, Tian Bu, Girish P. Chandranmeno...
SAC
2011
ACM
14 years 6 months ago
Site-autonomous distributed semantic caching
Semantic caching augments cached data with a semantic description of the data. These semantic descriptions can be used to improve execution time for similar queries by retrieving ...
Norvald H. Ryeng, Jon Olav Hauglid, Kjetil N&oslas...
ISBI
2004
IEEE
16 years 4 months ago
Clustering On Image Boundary Regions for Deformable Model Segmentation
We present a novel approach, clustering on local image profiles, for statistically characterizing image intensity in object boundary regions. In deformable model segmentation, a d...
Joshua Stough, Stephen M. Pizer, Edward L. Chaney,...