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» Improving HLRTA*( k )
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TPDS
1998
108views more  TPDS 1998»
15 years 1 months ago
Critical Path Profiling of Message Passing and Shared-Memory Programs
—In this paper, we introduce a runtime, nontrace-based algorithm to compute the critical path profile of the execution of message passing and shared-memory parallel programs. Our...
Jeffrey K. Hollingsworth
TCAD
2002
106views more  TCAD 2002»
15 years 1 months ago
Design of hierarchical cellular automata for on-chip test pattern generator
This paper introduces the concept of hierarchical cellular automata (HCA). The theory of HCA is developed over the Galois extension field (2 ), where each cell of the CA can store ...
Biplab K. Sikdar, Niloy Ganguly, Parimal Pal Chaud...
TIT
2002
103views more  TIT 2002»
15 years 1 months ago
Optimization of coded GMSK systems
Abstract--In this correspondence, block and convolutional coding for Gaussian minimum shift keying (GMSK) in additive white Gaussian noise (AWGN) channels is investigated. The perf...
D. K. Asano, Subbarayan Pasupathy
TPDS
2002
94views more  TPDS 2002»
15 years 1 months ago
Recursive Array Layouts and Fast Matrix Multiplication
The performance of both serial and parallel implementations of matrix multiplication is highly sensitive to memory system behavior. False sharing and cache conflicts cause traditi...
Siddhartha Chatterjee, Alvin R. Lebeck, Praveen K....
TVLSI
2002
78views more  TVLSI 2002»
15 years 1 months ago
Managing on-chip inductive effects
With process technology and functional integration advancing steadily, chips are continuing to grow in area while critical dimensions are shrinking. This has led to the emergence o...
Yehia Massoud, Steve S. Majors, Jamil Kawa, Tareq ...