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IPPS
2002
IEEE
15 years 4 months ago
Optimizing Graph Algorithms for Improved Cache Performance
Tiling has long been used to improve cache performance. Recursion has recently been used as a cache-oblivious method of improving cache performance. Both of these techniques are n...
Joon-Sang Park, Michael Penner, Viktor K. Prasanna
ASPDAC
1999
ACM
113views Hardware» more  ASPDAC 1999»
15 years 4 months ago
An Efficient Iterative Improvement Technique for VLSI Circuit Partitioning Using Hybrid Bucket Structures
In this paper, we present a fast and efficient Iterative Improvement Partitioning (IIP) technique for VLSI circuits and hybrid bucket structures on its implementation. Due to thei...
C. K. Eem, J. W. Chong
ICCD
2003
IEEE
107views Hardware» more  ICCD 2003»
15 years 8 months ago
Improving Branch Prediction Accuracy in Embedded Processors in the Presence of Context Switches
Embedded processors like Intel’s XScale use dynamic branch prediction to improve performance. Due to the presence of context switches, the accuracy of these predictors is reduce...
Sudeep Pasricha, Alexander V. Veidenbaum
ICCAD
2004
IEEE
127views Hardware» more  ICCAD 2004»
15 years 8 months ago
A yield improvement methodology using pre- and post-silicon statistical clock scheduling
— In deep sub-micron technologies, process variations can cause significant path delay and clock skew uncertainties thereby lead to timing failure and yield loss. In this paper,...
Jeng-Liang Tsai, Dong Hyun Baik, Charlie Chung-Pin...
WCNC
2008
IEEE
15 years 6 months ago
An Improved Method for GPS-Based Network Position Location in Forests
—In this paper we present a technique for improving the location performance based on the Global Positioning System (GPS) for networks of nodes in harsh environments and demonstr...
Christopher L. Hutchens, Brian R. Sarbin, Alyse C....