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» Improving Java performance using hardware translation
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ISCA
2002
IEEE
115views Hardware» more  ISCA 2002»
15 years 9 months ago
SafetyNet: Improving the Availability of Shared Memory Multiprocessors with Global Checkpoint/Recovery
We develop an availability solution, called SafetyNet, that uses a unified, lightweight checkpoint/recovery mechanism to support multiple long-latency fault detection schemes. At...
Daniel J. Sorin, Milo M. K. Martin, Mark D. Hill, ...
MICRO
2002
IEEE
109views Hardware» more  MICRO 2002»
15 years 9 months ago
Using modern graphics architectures for general-purpose computing: a framework and analysis
Recently, graphics hardware architectures have begun to emphasize versatility, offering rich new ways to programmatically reconfigure the graphics pipeline. In this paper, we exp...
Chris J. Thompson, Sahngyun Hahn, Mark Oskin
JCST
2008
94views more  JCST 2008»
15 years 4 months ago
Runtime Engine for Dynamic Profile Guided Stride Prefetching
Stride prefetching is recognized as an important technique to improve memory access performance. The prior work usually profiles and/or analyzes the program behavior offline, and u...
Qiong Zou, Xiao-Feng Li, Long-Bing Zhang
129
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HPCA
2000
IEEE
15 years 9 months ago
A Prefetching Technique for Irregular Accesses to Linked Data Structures
Prefetching offers the potential to improve the performance of linked data structure (LDS) traversals. However, previously proposed prefetching methods only work well when there i...
Magnus Karlsson, Fredrik Dahlgren, Per Stenstr&oum...
ICCD
1996
IEEE
145views Hardware» more  ICCD 1996»
15 years 9 months ago
Can Trace-Driven Simulators Accurately Predict Superscalar Performance?
There are four crucial issues associated with performance simulators: simulator retargetability, simulator validation, simulation speed and simulation accuracy. This paper documen...
Bryan Black, Andrew S. Huang, Mikko H. Lipasti, Jo...