2032 search results - page 114 / 407 » Improving Java performance using hardware translation |
170
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HPCA
2000
IEEE
15 years 9 months ago
2000
IEEE
Efficiency of synchronization mechanisms can limit the parallel performance of many shared-memory applications. In addition, the ever increasing performance gap between processor...
144
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ICCAD
2007
IEEE
16 years 1 months ago
2007
IEEE
— Starting at the 65nm node, stress engineering to improve performance of transistors has been a major industry focus. An intrinsic stress source – shallow trench isolation –...
172
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ISCA
2011
IEEE
14 years 8 months ago
2011
IEEE
In recent years, the increasing number of processor cores and limited increases in main memory bandwidth have led to the problem of the bandwidth wall, where memory bandwidth is b...
151
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ISCA
2006
IEEE
15 years 4 months ago
2006
IEEE
Conventional relaxed memory ordering techniques follow a proactive model: at a synchronization point, a processor makes its own updates to memory available to other processors by ...
130
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ICCD
2006
IEEE
16 years 1 months ago
2006
IEEE
— Identifying performance bottlenecks is important for microarchitects and application developers to produce high performance microprocessor designs and application software. Man...