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ASPDAC
2006
ACM
153views Hardware» more  ASPDAC 2006»
15 years 11 months ago
Diagonal routing in high performance microprocessor design
This paper presents a diagonal routing method which is applied to an actual microprocessor prototype chip. While including the layout functions for the conventional Manhattan rout...
Noriyuki Ito, Hideaki Katagiri, Ryoichi Yamashita,...
MSS
1999
IEEE
203views Hardware» more  MSS 1999»
15 years 9 months ago
Improved Adaptive Replacement Algorithm for Disk-Caches in HSM Systems
With an ever increasing amount of data to store, hierarchical storage management (HSM) systems must still use tape for tertiary storage. A disk cache is used to reduce the access ...
Ulrich Hahn, Werner Dilling, Dietmar Kaletta
SPDP
1993
IEEE
15 years 9 months ago
Architectural Support for Block Transfers in a Shared-Memory Multiprocessor
This paper examines how the performance of a shared-memory multiprocessor can be improved by including hardware support for block transfers. A system similar to the Hector multipr...
Steven J. E. Wilton, Zvonko G. Vranesic
EMSOFT
2004
Springer
15 years 10 months ago
Approximation of the worst-case execution time using structural analysis
We present a technique to approximate the worst-case execution time that combines structural analysis with a loop-bounding algorithm based on local induction variable analysis. St...
Matteo Corti, Thomas R. Gross
ICCD
2006
IEEE
115views Hardware» more  ICCD 2006»
16 years 1 months ago
Microarchitecture and Performance Analysis of Godson-2 SMT Processor
—This paper introduces the microarchitecture and logical implementation of SMT (Simultaneous Multithreading) improvement of Godson-2 processor which is a 64-bit, four-issue, out-...
Zusong Li, Xianchao Xu, Weiwu Hu, Zhimin Tang