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» Improving Java performance using hardware translation
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TC
2008
15 years 4 months ago
The Synonym Lookaside Buffer: A Solution to the Synonym Problem in Virtual Caches
To support dynamic address translation in today's microprocessors, the first-level cache is accessed in parallel with a translation lookaside buffer (TLB). However, this curre...
Xiaogang Qiu, Michel Dubois
VEE
2010
ACM
218views Virtualization» more  VEE 2010»
15 years 12 months ago
Improving compiler-runtime separation with XIR
Intense research on virtual machines has highlighted the need for flexible software architectures that allow quick evaluation of new design and implementation techniques. The inte...
Ben Titzer, Thomas Würthinger, Doug Simon, Ma...
SIGMETRICS
1999
ACM
15 years 9 months ago
Performance Issues in WWW Servers
—This paper evaluates techniques for improving operating system and network protocol software support for high-performance World Wide Web servers. We study approaches in three ca...
Erich M. Nahum, Tsipora P. Barzilai, Dilip D. Kand...
DATE
2008
IEEE
102views Hardware» more  DATE 2008»
15 years 11 months ago
A New Approach for Combining Yield and Performance in Behavioural Models for Analogue Integrated Circuits
A new algorithm is presented that combines performance and variation objectives in a behavioural model for a given analogue circuit topology and process. The tradeoffs between per...
Sawal Ali, Reuben Wilcock, Peter R. Wilson, Andrew...
135
Voted
SBACPAD
2004
IEEE
105views Hardware» more  SBACPAD 2004»
15 years 6 months ago
Cache Filtering Techniques to Reduce the Negative Impact of Useless Speculative Memory References on Processor Performance
High-performance processors employ aggressive speculation and prefetching techniques to increase performance. Speculative memory references caused by these techniques sometimes br...
Onur Mutlu, Hyesoon Kim, David N. Armstrong, Yale ...