2032 search results - page 235 / 407 » Improving Java performance using hardware translation |
165
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DATE
2009
IEEE
16 years 1 months ago
2009
IEEE
—Intensive research is performed to find post-CMOS technologies. A very promising direction based on reversible logic are quantum computers. While in the domain of reversible lo...
156
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DATE
2009
IEEE
16 years 1 months ago
2009
IEEE
— Decoupling capacitors (decaps) are typically used to reduce the noise in the power supply network. Because the delay of gates and interconnects is affected by the supply voltag...
162
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DATE
2008
IEEE
16 years 24 days ago
2008
IEEE
Efficient use of the memory hierarchy is critical for achieving high performance in a multiprocessor systemon-chip. An external memory that is shared between processors is a bottl...
172
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DATE
2007
IEEE
16 years 20 days ago
2007
IEEE
Loop unrolling is a well-known compiler optimization that can lead to significant performance improvements. When used in High Level Synthesis (HLS) unrolling can affect the contr...
166
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SBACPAD
2007
IEEE
16 years 18 days ago
2007
IEEE
One way to exploit Thread Level Parallelism (TLP) is to use architectures that implement novel multithreaded execution models, like Scheduled DataFlow (SDF). This latter model pro...