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DATE
2003
IEEE
141views Hardware» more  DATE 2003»
15 years 11 months ago
On-chip Stack Based Memory Organization for Low Power Embedded Architectures
This paper presents a on-chip stack based memory organization that effectively reduces the energy dissipation in programmable embedded system architectures. Most embedded systems ...
Mahesh Mamidipaka, Nikil D. Dutt
SBACPAD
2003
IEEE
135views Hardware» more  SBACPAD 2003»
15 years 11 months ago
Adaptive Compressed Caching: Design and Implementation
In this paper, we reevaluate the use of adaptive compressed caching to improve system performance through the reduction of accesses to the backing stores. We propose a new adaptab...
Rodrigo S. de Castro, Alair Pereira do Lago, Dilma...
ISCAS
2002
IEEE
201views Hardware» more  ISCAS 2002»
15 years 11 months ago
FGS+: optimizing the joint SNR-temporal video quality in MPEG-4 fine grained scalable coding
To enable video transmission over heterogeneous wireless networks, a highly scalable compression and streaming framework that can adapt to large and rapid bandwidth variations in ...
Raj Kumar Rajendran, Mihaela van der Schaar, Shih-...
ASPLOS
2011
ACM
14 years 10 months ago
Inter-core prefetching for multicore processors using migrating helper threads
Multicore processors have become ubiquitous in today’s systems, but exploiting the parallelism they offer remains difficult, especially for legacy application and applications ...
Md Kamruzzaman, Steven Swanson, Dean M. Tullsen
IEEEPACT
2009
IEEE
16 years 27 days ago
StealthTest: Low Overhead Online Software Testing Using Transactional Memory
—Software testing is hard. The emergence of multicore architectures and the proliferation of bugprone multithreaded software makes testing even harder. To this end, researchers h...
Jayaram Bobba, Weiwei Xiong, Luke Yen, Mark D. Hil...