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ECBS
2002
IEEE
81views Hardware» more  ECBS 2002»
15 years 11 months ago
Optimization of a Retargetable Functional Simulator for Embedded Processors
The objective of this research is to develop tools and methods for system-level optimization of embedded software that is executed on system-on-chip platforms. In particular, this...
Francesco Papariello, Gabriele Luculli
ISQED
2000
IEEE
91views Hardware» more  ISQED 2000»
15 years 10 months ago
Probabilistic Bottom-Up RTL Power Estimation
We address the problem of power estimation at the register-transfer level (RTL). At this level, the circuit is described in terms of a set of interconnected memory elements and co...
Ricardo Ferreira, A.-M. Trullemans, José C....
ISCAS
1999
IEEE
146views Hardware» more  ISCAS 1999»
15 years 10 months ago
Optimization of CMOS MEMS microwave power sensors
- Micromachined power sensors with operation up to 50 GHz were recently achieved in CMOS technology [1]. To improve their sensitivity and signal-to-noise ratio, while maintaining m...
V. Milanovic, M. Hopcroft, C. A. Zincke, M. Gaitan...
ITC
1998
IEEE
89views Hardware» more  ITC 1998»
15 years 10 months ago
Detecting resistive shorts for CMOS domino circuits
We investigate defects in CMOS domino gates and derive the test conditions for them. Very-Low-Voltage Testing can improve the defect coverage, which we define as the maximum detec...
Jonathan T.-Y. Chang, Edward J. McCluskey
ICCAD
1996
IEEE
121views Hardware» more  ICCAD 1996»
15 years 10 months ago
Identification of unsettable flip-flops for partial scan and faster ATPG
State justification is a time-consuming operation in test generation for sequential circuits. In this paper, we present a technique to rapidly identify state elements (flip-flops)...
Ismed Hartanto, Vamsi Boppana, W. Kent Fuchs