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» Improving Java performance using hardware translation
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VTS
2003
IEEE
95views Hardware» more  VTS 2003»
15 years 10 months ago
Built-In Reseeding for Serial Bist
Reseeding is used to improve fault coverage in pseudo-random testing. Most of the work done on reseeding is based on storing the seeds in an external tester. Besides its high cost...
Ahmad A. Al-Yamani, Edward J. McCluskey
136
Voted
ISPASS
2010
IEEE
15 years 12 months ago
Runahead execution vs. conventional data prefetching in the IBM POWER6 microprocessor
After many years of prefetching research, most commercially available systems support only two types of prefetching: software-directed prefetching and hardware-based prefetchers u...
Harold W. Cain, Priya Nagpurkar
EUROPAR
2007
Springer
15 years 11 months ago
Getting 10 Gb/s from Xen: Safe and Fast Device Access from Unprivileged Domains
The networking performance available to Virtual Machines (VMs) can be low due to the inefficiencies of transferring network packets between the host domain and guests. This can lim...
Kieran Mansley, Greg Law, David Riddoch, Guido Bar...
SENSYS
2006
ACM
15 years 11 months ago
Run-time dynamic linking for reprogramming wireless sensor networks
From experience with wireless sensor networks it has become apparent that dynamic reprogramming of the sensor nodes is a useful feature. The resource constraints in terms of energ...
Adam Dunkels, Niclas Finne, Joakim Eriksson, Thiem...
DATE
2008
IEEE
116views Hardware» more  DATE 2008»
15 years 11 months ago
A Variation Aware High Level Synthesis Framework
— The worst-case delay/power of function units has been used in traditional high level synthesis to facilitate design space exploration. As technology scales to nanometer regime,...
Feng Wang 0004, Guangyu Sun, Yuan Xie