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2011
14 years 8 months ago
Leveraging Value Locality in Optimizing NAND Flash-based SSDs
: NAND flash-based solid-state drives (SSDs) are increasingly being deployed in storage systems at different levels such as buffer-caches and even secondary storage. However, the ...
Aayush Gupta, Raghav Pisolkar, Bhuvan Urgaonkar, A...
144
Voted
DATE
2003
IEEE
145views Hardware» more  DATE 2003»
15 years 10 months ago
Automated Bus Generation for Multiprocessor SoC Design
The performance of a system, especially a multiprocessor system, heavily depends upon the efficiency of its bus architecture. This paper presents a methodology to generate a custo...
Kyeong Keol Ryu, Vincent John Mooney
MICRO
2009
IEEE
160views Hardware» more  MICRO 2009»
15 years 11 months ago
Variation-tolerant non-uniform 3D cache management in die stacked multicore processor
Process variations in integrated circuits have significant impact on their performance, leakage and stability. This is particularly evident in large, regular and dense structures...
Bo Zhao, Yu Du, Youtao Zhang, Jun Yang 0002
ASAP
2011
IEEE
233views Hardware» more  ASAP 2011»
14 years 4 months ago
Accelerating vision and navigation applications on a customizable platform
—The domain of vision and navigation often includes applications for feature tracking as well as simultaneous localization and mapping (SLAM). As these problems require computati...
Jason Cong, Beayna Grigorian, Glenn Reinman, Marco...
SECON
2007
IEEE
15 years 11 months ago
INPoD: In-Network Processing over Sensor Networks based on Code Design
—In this paper, we develop a joint Network Coding (NC)-channel coding error-resilient sensor-network approach that performs In-Network Processing based on channel code Design (IN...
Kiran Misra, Shirish S. Karande, Hayder Radha