2032 search results - page 307 / 407 » Improving Java performance using hardware translation |
138
Voted
IEEEPACT
2006
IEEE
15 years 11 months ago
2006
IEEE
Fast instruction decoding is a challenge for the design of CISC microprocessors. A well-known solution to overcome this problem is using a trace cache. It stores and fetches alrea...
169
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EUROSYS
2007
ACM
16 years 1 months ago
2007
ACM
Virtual memory has been successfully used in different domains to extend the amount of memory available to applications. We have adapted this mechanism to sensor networks, where,...
141
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DAC
2003
ACM
16 years 5 months ago
2003
ACM
Reseeding is used to improve fault coverage of pseudorandom testing. The seed corresponds to the initial state of the PRPG before filling the scan chain. In this paper, we present...
129
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ICCAD
2003
IEEE
16 years 1 months ago
2003
IEEE
In this paper, we study the problem of retiming of sequential circuits with both interconnect and gate delay. Most retiming algorithms have assumed ideal conditions for the non-lo...
121
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FPL
2007
Springer
15 years 11 months ago
2007
Springer
In this paper, we present a shared instruction and data memory controller for the On-Chip Memory (OCM) bus of the PowerPC embedded in the Virtex-4 chip. The traditional design of ...