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ISCAS
2005
IEEE
126views Hardware» more  ISCAS 2005»
15 years 10 months ago
A distributed FIFO scheme for on chip communication
— Interconnect delays are increasingly becoming the dominant source of performance degradation in the nano-meter regime, largely because of disturbances that result from parasiti...
Ray Robert Rydberg III, Jabulani Nyathi, Jos&eacut...
SAT
2005
Springer
162views Hardware» more  SAT 2005»
15 years 10 months ago
Heuristics for Fast Exact Model Counting
An important extension of satisfiability testing is model-counting, a task that corresponds to problems such as probabilistic reasoning and computing the permanent of a Boolean ma...
Tian Sang, Paul Beame, Henry A. Kautz
ISLPED
2003
ACM
80views Hardware» more  ISLPED 2003»
15 years 10 months ago
Level conversion for dual-supply systems
Dual-supply voltage design using a clustered voltage scaling (CVS) scheme is an effective approach to reduce chip power. The optimal CVS design relies on a level converter (LC) im...
Fujio Ishihara, Farhana Sheikh, Borivoje Nikolic
JMM2
2008
105views more  JMM2 2008»
15 years 4 months ago
Low Cost Projection Environment for Immersive Gaming
: As computer performance and graphics hardware continue to improve, the gamer is increasingly being presented with richer and more realistic visual environments. Viewing these vir...
Paul Bourke
153
Voted
KBSE
2003
IEEE
15 years 10 months ago
Unspeculation
Modern architectures, such as the Intel Itanium, support speculation, a hardware mechanism that allows the early execution of expensive operations—possibly even before it is kno...
Noah Snavely, Saumya K. Debray, Gregory R. Andrews