2032 search results - page 87 / 407 » Improving Java performance using hardware translation |
113
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ITC
2003
IEEE
15 years 10 months ago
2003
IEEE
The objective of this paper is to present an infrastructure IP (I-IP) designed to characterize yield loss in the process back-end. The I-IP structure is described in using a botto...
181
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IEEEPACT
2009
IEEE
15 years 2 months ago
2009
IEEE
Abstract--Version management, one of the key design dimensions of Hardware Transactional Memory (HTM) systems, defines where and how transactional modifications are stored. Current...
131
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MICRO
2008
IEEE
15 years 11 months ago
2008
IEEE
Hardware signatures have been recently proposed as an efficient mechanism to detect conflicts amongst concurrently running transactions in transactional memory systems (e.g., Bulk...
151
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OOPSLA
2009
Springer
15 years 11 months ago
2009
Springer
Software has spent the bounty of Moore’s law by solving harder problems and exploiting abstractions, such as highlevel languages, virtual machine technology, binary rewritdynami...
147
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MICRO
2010
IEEE
14 years 11 months ago
2010
IEEE
Today's transactional memory systems implement the two-phase-locking (2PL) algorithm which aborts transactions every time a conflict happens. 2PL is a simple algorithm that pr...