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» Improving Memory Energy Using Access Pattern Classification
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VLSID
2002
IEEE
114views VLSI» more  VLSID 2002»
15 years 10 months ago
Embedded DRAM (eDRAM) Power-Energy Estimation for System-on-a-Chip (SoC) Applications
Embedded DRAM (eDRAM) power-energy estimation is presented for system-on-a-chip (SOC) applications. The main feature is the signal swing based analytic (SSBA) model, which improve...
Yong-Ha Park, Jeonghoon Kook, Hoi-Jun Yoo
ASPLOS
2010
ACM
15 years 27 days ago
Micro-pages: increasing DRAM efficiency with locality-aware data placement
Power consumption and DRAM latencies are serious concerns in modern chip-multiprocessor (CMP or multi-core) based compute systems. The management of the DRAM row buffer can signif...
Kshitij Sudan, Niladrish Chatterjee, David Nellans...
DATE
2005
IEEE
133views Hardware» more  DATE 2005»
15 years 3 months ago
Compiler-Based Approach for Exploiting Scratch-Pad in Presence of Irregular Array Access
Scratch-pad memory is becoming an important fixture in embedded multimedia systems. It is significantly more efficient than the cache, in performance and power, and has the add...
Mohammed Javed Absar, Francky Catthoor
85
Voted
KDD
1998
ACM
122views Data Mining» more  KDD 1998»
15 years 1 months ago
Memory Placement Techniques for Parallel Association Mining
Many data mining tasks (e.g., Association Rules, Sequential Patterns) use complex pointer-based data structures (e.g., hash trees) that typically suffer from sub-optimal data loca...
Srinivasan Parthasarathy, Mohammed Javeed Zaki, We...
DATE
2010
IEEE
180views Hardware» more  DATE 2010»
15 years 2 months ago
A reconfigurable cache memory with heterogeneous banks
Abstract— The optimal size of a large on-chip cache can be different for different programs: at some point, the reduction of cache misses achieved when increasing cache size hits...
Domingo Benitez, Juan C. Moure, Dolores Rexachs, E...