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» Improving Memory Energy Using Access Pattern Classification
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CC
2003
Springer
192views System Software» more  CC 2003»
15 years 2 months ago
Address Register Assignment for Reducing Code Size
Abstract. In DSP processors, minimizing the amount of address calculations is critical for reducing code size and improving performance since studies of programs have shown that in...
Mahmut T. Kandemir, Mary Jane Irwin, Guilin Chen, ...
MICRO
2009
IEEE
144views Hardware» more  MICRO 2009»
15 years 4 months ago
Characterizing flash memory: anomalies, observations, and applications
Despite flash memory’s promise, it suffers from many idiosyncrasies such as limited durability, data integrity problems, and asymmetry in operation granularity. As architects, ...
Laura M. Grupp, Adrian M. Caulfield, Joel Coburn, ...
OSDI
1994
ACM
14 years 11 months ago
HiPEC: High Performance External Virtual Memory Caching
Traditional operating systems use a xed LRU-like page replacement policy and centralized frame pool that cannot properly serve all types of memory access patterns of various appli...
Chao-Hsien Lee, Meng Chang Chen, Ruei-Chuan Chang
CCGRID
2009
IEEE
15 years 4 months ago
Improving Parallel Write by Node-Level Request Scheduling
In a cluster of multiple processors or cpu-cores, many processes may run on each compute node. Each process tends to issue contiguous I/O requests for snapshot, checkpointing or s...
Kazuki Ohta, Hiroya Matsuba, Yutaka Ishikawa
ICCAD
2009
IEEE
179views Hardware» more  ICCAD 2009»
14 years 7 months ago
Automatic memory partitioning and scheduling for throughput and power optimization
Hardware acceleration is crucial in modern embedded system design to meet the explosive demands on performance and cost. Selected computation kernels for acceleration are usually ...
Jason Cong, Wei Jiang, Bin Liu, Yi Zou