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» Improving Placement under the Constant Delay Model
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ASPDAC
2009
ACM
161views Hardware» more  ASPDAC 2009»
15 years 4 months ago
Risk aversion min-period retiming under process variations
— Recent advances in statistical timing analysis (SSTA) achieve great success in computing arrival times under variations by extending sum and maximum operations to random variab...
Jia Wang, Hai Zhou
ISPD
1999
ACM
94views Hardware» more  ISPD 1999»
15 years 1 months ago
Gate sizing with controlled displacement
- In this paper, we present an algorithm for gate sizing with controlled displacement to improve the overall circuit timing. We use a path-based delay model to capture the timing c...
Wei Chen, Cheng-Ta Hsieh, Massoud Pedram
113
Voted
ICCD
2007
IEEE
109views Hardware» more  ICCD 2007»
15 years 1 months ago
Improving cache efficiency via resizing + remapping
In this paper we propose techniques to dynamically downsize or upsize a cache accompanied by cache set/line shutdown to produce efficient caches. Unlike previous approaches, resiz...
Subramanian Ramaswamy, Sudhakar Yalamanchili
CISS
2007
IEEE
15 years 3 months ago
Data Dissemination in Wireless Broadcast Channels: Network Coding or Cooperation
—Network coding and cooperative diversity have each extensively been explored in the literature as a means to substantially improve the performance of wireless networks. Yet, lit...
Ivana Stojanovic, Masoud Sharif, David Starobinski
PDPTA
2003
14 years 10 months ago
Quaternary Arithmetic Logic Unit on a Programmable Logic Device
Common binary arithmetic operations such as addition/subtraction and multiplication suffer from O(n) carry propagation delay where n is the number of digits. Carry lookahead helps...
Songpol Ongwattanakul, Phaisit Chewputtanagul, Dav...