Sciweavers

196 search results - page 11 / 40
» Improving Placement under the Constant Delay Model
Sort
View
ISCA
2007
IEEE
143views Hardware» more  ISCA 2007»
15 years 3 months ago
Interconnect design considerations for large NUCA caches
The ever increasing sizes of on-chip caches and the growing domination of wire delay necessitate significant changes to cache hierarchy design methodologies. Many recent proposal...
Naveen Muralimanohar, Rajeev Balasubramonian
ICCAD
2004
IEEE
110views Hardware» more  ICCAD 2004»
15 years 6 months ago
Wire-length prediction using statistical techniques
We address the classic wire-length estimation problem and propose a new statistical wire-length estimation approach that captures the probability distribution function of net leng...
Jennifer L. Wong, Azadeh Davoodi, Vishal Khandelwa...
ICCAD
1994
IEEE
90views Hardware» more  ICCAD 1994»
15 years 1 months ago
Low-cost single-layer clock trees with exact zero Elmore delay skew
We give the rst single-layer clock tree construction with exact zero skew according to the Elmore delay model. The previous Linear-Planar-DME method 11 guarantees a planar solutio...
Andrew B. Kahng, Chung-Wen Albert Tsao
ISPD
2003
ACM
133views Hardware» more  ISPD 2003»
15 years 2 months ago
Closed form expressions for extending step delay and slew metrics to ramp inputs
: Recent years have seen significant research in finding closed form expressions for the delay of an RC circuit that improves upon the Elmore delay model. However, several of these...
Chandramouli V. Kashyap, Charles J. Alpert, Frank ...
INFOCOM
2010
IEEE
14 years 8 months ago
Throughput, Delay, and Mobility in Wireless Ad Hoc Networks
—Throughput capacity in wireless ad hoc networks has been studied extensively under many different mobility models such as i.i.d. mobility model, Brownian mobility model, random ...
Pan Li, Yuguang Fang, Jie Li