99 search results - page 15 / 20 » Improving Program Efficiency by Packing Instructions into Re... |
CODES
2005
IEEE
15 years 3 months ago
2005
IEEE
Design of programmable processors and embedded applications requires instruction-set simulators for early exploration and validation of candidate architectures. Interpretive simul...
85
Voted
PLDI
2003
ACM
15 years 2 months ago
2003
ACM
Speculative execution, such as control speculation and data speculation, is an effective way to improve program performance. Using edge/path profile information or simple heuristi...
IWSOC
2003
IEEE
15 years 2 months ago
2003
IEEE
: - A filter cache is proposed at a higher level than the L1 (main) cache in the memory hierarchy and is much smaller. The typical size of filter cache is of the order of 512 Bytes...
MICRO
1998
IEEE
15 years 1 months ago
1998
IEEE
We present an architecture that features dynamic multithreading execution of a single program. Threads are created automatically by hardware at procedure and loop boundaries and e...
96
Voted
CASES
2010
ACM
14 years 7 months ago
2010
ACM
The performance of most embedded systems is critically dependent on the memory hierarchy performance. In particular, higher cache hit rate can provide significant performance boos...