1045 search results - page 103 / 209 » Improving SHA-2 Hardware Implementations |
96
Voted
CODES
2005
IEEE
15 years 6 months ago
2005
IEEE
In this paper, we show a novel approach to accelerate loops by tightly coupling a coprocessor to an ASIP. Latency hiding is used to exploit the parallelism available in this archi...
109
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CODES
2005
IEEE
15 years 6 months ago
2005
IEEE
We design and implement a cryptographic biometric authentication system using a microcoded architecture. The secure properties of the biometric matching process are obtained by me...
91
Voted
CAV
2005
Springer
15 years 6 months ago
2005
Springer
Abstract. We address the issue of efficiently automating assume-guarantee reasoning for simulation conformance between finite state systems and specifications. We focus on a non...
82
Voted
ASPDAC
2004
ACM
15 years 6 months ago
2004
ACM
Abstract— A split shared-bus architecture with multiple simultaneous bus accesses is proposed. Compared to traditional bus architectures, the performance of proposed architecture...
WMPI
2004
ACM
15 years 6 months ago
2004
ACM
This paper discusses die cost vs. performance tradeoffs for a PIM system that could serve as the memory system of a host processor. For an increase of less than twice the cost of ...