1045 search results - page 184 / 209 » Improving SHA-2 Hardware Implementations |
ICDCS
2009
IEEE
15 years 9 months ago
2009
IEEE
While it is well known that network coding achieves optimal flow rates in multicast sessions, its potential for practical use has remained to be a question, due to its high compu...
107
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CF
2009
ACM
15 years 7 months ago
2009
ACM
Chip Multiprocessor (CMP) memory systems suffer from the effects of destructive thread interference. This interference reduces performance predictability because it depends heavil...
197
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HPCA
2007
IEEE
15 years 6 months ago
2007
IEEE
Shared memory multiprocessors play an increasingly important role in enterprise and scientific computing facilities. Remote misses limit the performance of shared memory applicat...
93
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ACMMSP
2004
ACM
15 years 6 months ago
2004
ACM
Instruction combining is an optimization to replace a sequence of instructions with a more efficient instruction yielding the same result in a fewer machine cycles. When we use it...
131
Voted
ISPASS
2003
IEEE
15 years 5 months ago
2003
IEEE
Achieving high performance in cryptographic processing is important due to the increasing connectivity among today’s computers. Despite steady improvements in microprocessor and...