1045 search results - page 62 / 209 » Improving SHA-2 Hardware Implementations |
FPL
2004
Springer
15 years 4 months ago
2004
Springer
Abstract. This paper presents a new data representation known as Dual FiXedpoint (DFX), which employs a single bit exponent to select two different fixedpoint scalings. DFX provide...
94
Voted
TON
2010
14 years 7 months ago
2010
Abstract-- We propose a powerful MAC/PHY cross-layer approach to measuring 802.11 transmission opportunities in WLAN networks on a per-link basis. Our estimator can operate at a si...
100
Voted
ASPDAC
1995
ACM
15 years 4 months ago
1995
ACM
- We address the problem of transforming a behavioral specification so that synthesis of a testable implementation from the new specification requires significantly less area and ...
106
Voted
AIA
2007
15 years 2 months ago
2007
This paper presents a parallel hardware implementation of a well-known navigation control method on reconfigurable digital circuits. Trajectories are estimated after an iterated ...
79
Voted
ICCD
2008
IEEE
15 years 9 months ago
2008
IEEE
High associativity is important for level-two cache designs [9]. Implementing CAM-based Highly Associative Caches (CAM-HAC), however, is both costly in hardware and exhibits poor s...